DIGITAL ELECTRONICS

T Flip-Flop

A T flip-flop changes state on an active clock edge when its toggle input is high. When T is low, it retains its current state. With T held high, Q toggles every clock edge and produces a divide-by-two output. This makes the T flip-flop useful in binary counters, clock dividers and sequence logic. The diagram shows the minimum signals needed to understand the behavior: a toggle control, a clock, and complementary outputs. Add reset circuitry when the counter or divider needs a known initial state.

UPDATED 2026-09-24
EXAMPLET Flip-Flop
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CASE ANALYSIS

Scenario

A toggle-controlled sequential logic stage.

Key decisions

  • Toggle input: T determines whether the state changes at the clock edge.
  • Clock input: The clock controls when the change occurs.
  • Complementary outputs: Q and Q-bar show the stored state.

When to reuse this

Use this for counters and divide-by-two stages.

FAQ

Frequently asked questions

What does the T input do?01
When T is high, the flip-flop toggles at the active clock edge; when low, it holds state.
Why is a T flip-flop useful for counters?02
A toggle stage naturally divides a clock by two, and cascaded stages form binary counts.
What is Q-bar?03
It is the complement of the Q output.
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