シナリオ
A student needs to understand the top-level block structure of a 4-bit adder-subtractor for a digital design lab.
この図に含まれるもの
図の背後にある意思決定を読み解く。
01
Use XOR gates on B inputs controlled by M
02
Propagate carry between full adders
03
M doubles as carry-in for subtraction
When explaining or documenting combinatorial arithmetic circuits at the architectural level.