4-to-1 Multiplexer Circuit

4-to-1 Multiplexer

A 4-to-1 multiplexer uses two binary select inputs to choose one of four data inputs. Each select combination maps to one input, then routes that value to Y. The circuit is common in digital systems that need to share a bus, select an operating mode or implement a small truth table. This example keeps the data sources and select states visible so the selection relationship is clear. The same structure scales: an 8-to-1 multiplexer needs three select bits, while a 16-to-1 multiplexer needs four.

種類 回路図規格 IEEE Std 315 / ANSI Y32.2エンジン schematex-circuit更新日 2026/9/24

依頼内容

“Draw a 5 V 4-to-1 multiplexer with I0 through I3 data inputs, select lines S0 and S1, and output Y with a 10 kΩ load to ground.”

次はこちらSet I2 to 5 V.Add an active-low enable input.

この図に含まれるもの

図の背後にある意思決定を読み解く。

01Four inputs

I0 through I3 provide selectable data.

02Two select bits

S0 and S1 encode one of four choices.

03Output Y

The selected input appears at one output.

Use this for a four-source digital signal selector.

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よくある質問

Why does a 4-to-1 MUX need two select lines?

Two binary bits represent four possible selections.

What do I0 through I3 mean?

They are the four data inputs available to the multiplexer.

Can it select analog signals?

This logic example selects digital levels; analog multiplexers use different switch circuitry.