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logic circuits · digital design · nand gates

NAND-Only SR Latch

類型 邏輯閘圖標準 IEEE Std 91/91a-1991引擎 schematex-logic更新時間 2026/7/10
NAND-Only SR Latch
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需求

“An SR latch built from two cross-coupled NAND gates, with active-low set and reset inputs and outputs Q and not-Q.”

接著試試Add an enable input to make it a gated latchTurn it into a D latch
這張圖裡有什麼

看懂背後的決策。

01

Use active-low inputs for NAND-based latching

02

Cross-coupled feedback creates bistable state

When teaching digital electronics, demonstrating universal gates, or designing custom latch circuits from discrete logic.

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