SR Latch
An SR latch stores one bit using set and reset inputs. The set input requests one output state, while reset requests the opposite state; after either input is released, the latch retains its last valid state. Q and Q-bar provide complementary outputs. Unlike a flip-flop, a basic SR latch is not edge-triggered, so its inputs must be controlled carefully. This diagram is useful for introducing bistable logic, interlocks and simple state retention. Avoid the prohibited input combination for the chosen NOR or NAND implementation.
Open it in the AI editor with a prompt pre-filled — keep what works, change what doesn't.
Scenario
The simplest bistable memory element.
Key decisions
- Set input: Set requests Q high.
- Reset input: Reset requests Q low.
- Complementary outputs: Q and Q-bar expose the stored state.
When to reuse this
Use this to explain basic latch behavior before clocked flip-flops.
Frequently asked questions
What does an SR latch store?
Is an SR latch edge-triggered?
Why are Q and Q-bar both shown?
Tweak it with chat, export PNG/SVG, or fork it for your own use case.