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CMOS

3-Input CMOS NOR Gate Schematic

A worked cmos example, rendered live. Open it in the AI editor and adapt it to your own case.

UPDATED 2026-08-09
TYPECircuit
USE-CASECmos Logic Gate Circuits
EXAMPLE3-Input CMOS NOR Gate Schematic
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CASE ANALYSIS

Scenario

Design a transistor-level circuit for a 3-input CMOS NOR gate.

Key decisions

  • Three PMOS transistors in series pull output high when all inputs are low
  • Three NMOS transistors in parallel pull output low when any input is high

When to reuse this

Use for illustrating CMOS combinational logic, teaching digital IC design, or analyzing CMOS gate structure.

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